I’m happy to share that my second paper submitted to Electronics Journal has recently been published. The article entitled: “A Proof-of-Concept FPGA-Based Clock Signal Phase Alignment System” describes the primary topic of my PhD research – a simple and efficient clock phase synchronization method and system. In the article I’ve also described an FPGA implementation of the system.

I’m happy to announce that my first paper submitted to Electronics Journal has recently been published. The article entitled: “Relative Jitter Measurement Methodology and Comparison of Clocking Resources Jitter in Artix 7 FPGA” describes the concept and verification of jitter level comparison methodology. Also the measurements of multiple different Artix 7 FPGA configurations are also presented.