Hi! I’m Andrzej. Nice to meet you.
My name is Andrzej A. Wojciechowski and I am an electronics engineer. I specialize in digital system design. There is no single name for my profession. It’s often called: FPGA Engineer, Digital Design Engineer, FPGA/HDL Developer, (Digital) IC Designer, or similar.
Currently I have a Master of Science in Electronics Engineering and I am working on my PhD in the field of digital integrated circuits. Hopefully someday I will update this paragraph with a higher degree.
I am from Poland and based in Warsaw.
Hardware Description Languages
I have experience using both VHDL and Verilog Hardware Description Languages (HDLs) and a little of SystemVerilog. For more advanced designs I prefer to use VHDL for its more abstract features, which don’t exists in standard Verilog.
VHDL
Verilog
Programming languages
Languages I use for tasks automation and writing scripts. Sometimes I write a simple GUI programs to simplify the workflow.
Python
Tcl/Tk
Bash
Tools
I have used a number of industry standard as well as open-source programs. In many cases combining several tools using custom scripts simplifies, improves and accelerate workflow.
Git
GitLab
SVN
Quartus Prime
Vivado
ISE
Sublime Text
ModelSim
Riviera-PRO
LaTeX
KiCad
Docker
GNU Octave
Icarus Verilog
GTKWave
Operating Systems
I use all of the three most known and used operating systems on a daily basis. Each of them has advantages and disadvantages and at least partially different set of tools. That’s why I select a right operation system for a required task.
MacOS
My preferred operating system for general use. Unfortunately a lot of the tools are not available for MacOS.
GNU/Linux
For me Linux most of the time allows me to do the job. It’s not as annoying as some others and has proper terminal.
Windows
My least favorite of the three. However, a lot of the commercial industry standard tools are created for Windows.
